1. Field of the Invention
This invention relates to a dynamic flip-flop circuit which operates with electric charge charged into and discharged from a parasitic capacitor in a circuit.
2. Description of the Related Art
A flip-flop (F/F) usually has two stable states of H and L and is used as a basic circuit for a main storage apparatus, a cache memory or a register of a computer. Flip-flops are classified into RS-type, JK-type, T-type and D-type flip-flops depending upon the configuration and function of the circuit. The flip-flops of the type described are selectively used in accordance with an purpose of use. For example, a D-type flip-flop (hereinafter referred to as flip-flop circuit) latches a digital data signal inputted thereto when the level of a clock inputted thereto from the outside changes from the H level to the L level or conversely from the L level to the H level. Thereafter, the flip-flop circuit keeps its output.
Such a flip-flop circuit as just mentioned is in the past formed from a static circuit such as a CMOS (Complementary MOS) flip-flop or a SCL (Source Coupled Logic) flip-flop. On the other hand, in recent years, a dynamic type flip-flop circuit which operates with charge which is charged into and discharged from a parasitic capacitor in a circuit has been proposed. One of such flip-flop circuits as just mentioned is disclosed, for example, in “High-speed CMOS Circuit Technique”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 24, No. 1, February, 1989. When compared with the flip-flop circuit formed from such a static circuit as described above, the dynamic flip-flop circuit is advantageous in that it exhibits low power consumption and can operate at a high speed.